(1) Field of the Invention
The present invention relates to buffering data in a computer system. More particularly, the present invention relates to handling overflow data which results when a buffer is full.
(2) Related Art
Traditional buffers are designed to handle a worst case scenario. These buffers, typically located on an integrated circuit in computer system memory or on a card such as in a local graphics frame buffer memory are typically quite large (on the order of megabytes). These buffers must be large to manage the maximum possible mismatch between the generation of commands from a data source and the consumption of data by a data user. Such massive storage is unwieldly and expensive.
Two implementations of memory are used to generate large buffers. A first implementation of memory uses a very large first-input first-output (FIFO) buffer. In some embodiments, dual-ported implementations of FIFO buffers may be used. Dual ported memory can simultaneously handle input and output, and thus are faster than system memory. However such large dual-ported FIFOs are expensive.
A second implementation of a buffer uses the system memory of a computer. Such an implementation may result in excessive data traffic to system memory. Furthermore, system memory is typically single-ported to support only one read or write operation at a time. System memory typically cannot handle concurrent read and write streams. The single-ported characteristic makes system memory buffers slower than FIFO buffers. In high speed imaging applications, slow speeds may be unacceptable.
In view of the expense of large FIFO buffers and the slower speeds of system memory, a method and apparatus which uses smaller FIFO buffers most of the time and system memory as an overflow memory is desirable. Such a system will be described in the following patent application.